Computer organization and architecture (COA) is a core course in the curriculum of CSE, EE and ECE. Laboratory experiments essential to understanding basics. Most places used bread board based setup. This simulator provides an interactive environment for creating and conducting simulated experiments on computer organization and architecture. It supports gate level design to CPU design.
The Objective is to Expose the students to the various key aspects of Digital Logic and Computer Organization by enabling them to perform FPGA based prototyping of experiments with support of a virtual environment. The primary need for virtualisation here is multifold.
1.Digital Logic and Computer Organization are core courses in most of the Undergraduate Curricula of the entire Electrical Sciences Discipline(Computer Science / Engg., Electronics, Electrical) etc.
2. Many colleges/institutes cannot procure sufficient number of FPGA boards for their students.
Even when such FPGA boards are available, making them available round the clock is difficult.
4. Expert help is required to effectively use these FPGA boards and such help can be easily channeled through a virtual environment.
5. Helps to standardize the set of Experiments to a large extent.
- UG
- Computer Science Engineering, Mechatronics, Electrical Engineering, Electronics branches
- PG
- Computer Science Engineering, Mechatronics, Electrical Engineering, Electronics branches
The lab contents are chosen such that it covers the syllabi of the Digital Logic and Computer organization course of various universities.
- IIT Kharagpur
Professor,
Computer Science and Engineering